Re: OMS VME-8 motor controllers: PAL upgrades

[RIVERS@BNLX26.NSLS.BNL.GOV (Mark Rivers)]

Mark Engbretson writes:

>It is potentially a much worse problem than that.  Not only do you have the
>latency, but the OMS board is broadcasting its position at each of those 50ms
>steps as well. To make a long story short, if you are moving, let's say, a
>huber and associated analysis theta/2theta motors, you can easily exceed the 
>computation power of your IOC as it tries to keep up with the resultant
>message storms.

Are you sure about this? My reading of the OMS manual is that the OMS board
does not 'broadcast' its position, but rather only responds to specific
queries for position (RP), status (RA, QA), etc. of the motors. If you are
moving lots of motors simultaneously, then each record will indeed be
processing at 10 Hz, and requesting the motor status from the board at this
rate. However, I would not call this a 'message storm', since the OMS board is
only sending out status in response to specific query requests. What is your
evidence that this is exceeding the 'computation power' of the IOC? I don't
believe that there is much computation going on. However, if you have observed
high CPU utilization then perhaps the tight loop which device support uses to
send/receive characters from the board is the problem, and the driver needs to
be changed to use interrupts to determine when the character buffer is empty.

My understanding of the operation in interrupt mode is that an interrupt will 
be generated whenever any motor operation completes, but the OMS board
does not automatically send out any messages, it only sends out replies to
specific queries.

> The lower the latency, the worse the problem.  

I think you mean the faster the polling the worse the problem. If the driver
used 'operation complete' interrupts then low latency could be achieved
without requiring a fast poll time.

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